In this paper, we extract the mobility of ultra-thin, body buried oxide and fully depleted silicon-on-insulator MOSFET, for different front and back-gate configurations. The mobility values are found by using the Capacitance - Gate Voltage and Current - Gate Voltage characteristics. In addition, the maximum electron mobility is calculated for both configurations: SiON/Si (front-gate) and SiO2/Si (back-gate). Based on the mobility peak, it is determined that the electron transport can be improved by a factor of 1.6 for the front gate configuration. This improvement is explained by the back-channel activation. On the other hand, for the back-gate configuration the electron mobility is improved by a factor of 2.5. A second peak is observed in the electron mobility but cannot be appreciated, mainly because of the influence of an additional capacitance.
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